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UVM- FPGA Verification Engineer Eindhoven TMC

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Gevraagd

  • Fulltime
  • Ervaren/Expert
  • Engels (taal)

Aanbod

  • Loondienst (vast)
 

Vacature in het kort

Eindhoven
Join the team as an FPGA Verification Engineer and immerse yourself in cutting-edge projects! Utilize your skills to develop UVM environments, verify complex designs, and guide junior engineers. Engage with a dynamic team and contribute to high-impact technological solutions. Enjoy a vibrant work culture with professional growth opportunities and the freedom to steer your career. Make a difference while thriving in a collaborative and innovative environment. Uncover the reasons why this opportunity is worth considering.
 

Over het bedrijf

TMC
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Volledige vacaturetekst

Join our team as an FPGA Verification Engineer! Develop UVM environments, verify complex designs, and mentor juniors. Work on innovative projects in Eindhoven. Apply now and boost your career!


Over The Member Company

Wij zijn een internationaal hightech consultancybureau met een team van ondernemende ingenieurs, wetenschappers en digitale experts van over de hele wereld. We bieden consultancydiensten aan onze toonaangevende klanten in diverse servicegebieden zoals:

  • Technology & Engineering
  • Energy & Renewables
  • Life sciences & Pharma
  • Digital & IT

Over deze vacature

We are looking for a highly skilled FPGA Verification Engineer with expertise in Universal Verification Methodology (UVM) to join our advanced team in Eindhoven. In this role, you will focus on verifying complex FPGA designs, ensuring they meet rigorous performance, functionality, and reliability standards. Working alongside a multidisciplinary team, you will play a key role in ensuring the quality and robustness of our FPGA-based solutions.

Key Responsibilities:

  • Develop and implement UVM-based verification environments to validate FPGA designs.
  • Define verification strategies, plans, and test scenarios based on design specifications.
  • Create, simulate, and debug testbenches to verify design functionality and performance.
  • Perform functional, code coverage, and assertion-based verification to ensure robust designs.
  • Identify, debug, and resolve design issues through simulation and detailed analysis.
  • Collaborate closely with FPGA designers to understand design intent and resolve verification bottlenecks.
  • Document verification methodologies, results, and lessons learned to support future projects.
  • Stay informed about advancements in UVM, FPGA verification techniques, and industry best practices.
  • Plan and execute verification from scratch.
Wat we van jou verwachten
  • Bachelor's or Master's in Electrical/Computer Engineering.
  • 5+ years of FPGA verification experience with UVM.
  • Experience with SystemVerilog and major FPGA tools (ModelSim, Questa, Vivado, Quartus).
  • Proficiency in scripting languages (Python, Perl, TCL).
  • Strong analytical and problem-solving skills.
  • Good communication skills in English.
Wat kun je van ons verwachten
  • Opportunities to work on innovative and impactful projects.
  • A supportive and collaborative team culture.
  • Professional growth and development.
  • A challenging and stimulating work environment in which you can be the director of your own career.
  • As an Employeneur, you are part of our TMC family. Next to our outstanding technical expertise, fun and engagement are meaningful parts of our culture.

#LI-SF1




Gevraagd

  • Bachelor's or Master's in Electrical/Computer Engineering.
  • 5+ years of FPGA verification experience with UVM.
  • Experience with SystemVerilog and major FPGA tools (ModelSim, Questa, Vivado, Quartus).
  • Proficiency in scripting languages (Python, Perl, TCL).
  • Strong analytical and problem-solving skills.
  • Good communication skills in English.
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